1. Field of the Invention
The present invention concerns stabilized power supplies known as "switch mode power supplies".
A switch mode supply functions in the following manner: a primary transformer winding receives a current that is, for example, issuing from a rectifying bridge receiving power from the alternating power mains. The current in the transformer is chopped by a switch (for example a power transistor) placed in series with the primary winding.
A control circuit of the transistor establishes periodic square pulses to turn on the transistor. During the square pulse period current passage is authorized; outside of this square pulse period current passage is prohibited.
On one (or several) secondary winding(s) of the transformer, an alternating voltage is thus received. This voltage is rectified and filtered in order to produce a direct voltage that is the output direct voltage of the switch mode supply.
In order to stabilize the value of this direct voltage, the duty cycle of the switch is modified, i.e. the ratio between the conduction duration and the blocking duration in a chopped period.
FIG. 1 represents by way of example a switch mode power structure manufactured by the applicant in which two integrated circuits are used. One of the circuits, CI1, acts to control the base of a power switching transistor T.sub.p for applying thereto periodic control signals for putting under conduction and blocking control. This base control circuit CI1 is placed on the side of the primary winding EP of the transformer TA for reasons which will become apparent from the description given herein-below. The other integrated circuit, regulation circuit CI2, is on the contrary placed on the side of the secondary winding ES1 and is used to examine the output voltage Vs of the power supply in order to produce regulation signals that it transmits to the first integrated circuit through a small transformer TX. The first integrated circuit CI1 uses these regulation signals to modify the duty cycle of conduction of the switching transistor Tp and thus of adjusting the output voltage Vs of the power supply.
FIG. 1 shows the line of the public electric distribution mains under reference 10 (local supply circuit or mains at 110 or 220 volts, 50 or 60 hertz). This line is connected through a filter 12 to the input of a rectifying bridge 14, the output of which is connected on the one hand to a primary electric mass, represented throughout by a black triangle pointing downwards, and on the other hand to one end of the primary winding EP of the supply transformer TA.
A filtering capacitor 16 is placed in parallel on the outputs of the rectifying bridge 14. The other end of the primary winding is connected to the collector of the switching transistor Tp, the emitter of which is connected to the primary mass through a small current measuring resistance 18.
The transformer is provided with several secondary windings that are preferably galvanically insulated from the mains and connected for example to a secondary electric mass galvanically insulated from the primary mass.
In the present description, each of the secondary windings has one end connected to the secondary mass. The other end supplies a respective low-pass filtering capacitor through a respective rectifying diode.
Reference in the following description will be made to a single secondary winding ES1, connected by a diode 20 to a capacitor 22. The direct output voltage of the switch mode supply is the voltage Vs at the terminals of the capacitor 22; but it is well understood that other direct output voltages can be obtained at the terminals of the other filtering capacitors connected to the secondary windings. These output voltages constitute stabilized power supplies for utilization circuits (not represented). By way of example, a secondary winding ES2 supplies a stabilized power voltage of several volts for the regulation integrated circuit CI2 to which reference was made herein-above. It is thus checked that the circuit is not powered and therefore cannot supply signals as long as the switching does not function.
The same is true a priori for the base control integrated circuit CI1 of the power transistor Tp, which circuit is powered by a stabilized voltage supplied from a secondary winding ES3, from a diode 24 and from a capacitor 26 (it will be noted that this winding, although being a secondary winding is connected to the primary ground and not to the secondary mass, this for the very simple reason that the integrated circuit CI1 is necessarily galvanically connected to the primary).
However, as it is necessary to ensure starting of the chopped power supply, it has been foreseen that the power terminal 28 of the integrated circuit CI1 is also directly connected to the mains through a high resistance 30 and a diode 32; this is possible since the integrated circuit CI1 is connected to the primary ground; it is not possible for the circuit CI2 which must remain galvanically insulated from the mains. Once the switch mode power supply functions normally, the stabilized direct voltage issuing from the winding ES3 and from the diode 24 has priority over the voltage issuing from the mains and from the diode 32; this diode 32 is blocked and the direct power supply through the mains no longer intervenes after the initial starting phase.
The role of the integrated circuits CI1 and CI2 will now be defined.
The regulation circuit CI2 receives from a divider bridge 34, placed at the terminals of the capacitor 22, i.e. at the output of the stabilized power supply, data as to the value of the voltage to be stabilized Vs.
This data is compared with a desired value and applied to a pulse width modulator that establishes periodic square pulses having variable width in function of the value of the output voltage Vs; the lower is Vs the larger will be the width of the square pulses.
The square pulses are established at the switching frequency of the switch mode supply. This frequency is thus established on the side of the secondary of the circuit; it is generated either inside the circuit CI2, or outside in a circuit (not shown) in the form of a saw-tooth shaped voltage at the selected switching frequency. This saw-tooth voltage is used in a manner known per se to perform the width modulation.
The variable width square pulses, at the switching frequency, are applied to a primary winding 36 of a small transformer TX, the secondary winding, 38, of which is galvanically insulated from the primary, supplies positive and negative pulses to the rising and descending edges, respectively of the variable width square pulses.
It is these position and frequency pulses determined by the regulation circuit CI2, which constitute regulation signals applied to an input 40 of the base control circuit CI1.
The transformer TX is constituted by several coil turns wound on a ferrite rod, the turns of the primary and the turns of the secondary being sufficiently spaced apart from one another to respect the galvanic insulation standards between primary circuits and secondary circuits of the switch mode supply.
The base control integrated circuit CI1 comprises various inputs among which have been mentioned herein-above a power input 28 and a regulation signal input 40; a current measuring input 44 connected to the current measuring resistor 18; and an inhibition input allowing to check the magnetization state of a transformer. Furthermore, inputs can be provided to connect the elements (resistors, capacitors) that should form part of the integrated circuit itself but which for technological reasons (of bulk) or for practical reasons (possibilities of adjustment by the user) are externally mounted.
The integrated circuit CI1 furthermore comprises an output 46 which is intended to be connected by a direct galvanic connection to the base of the power transistor Tp. This output supplies square pulses for bringing the transistor Tp to the on or off state.
FIG. 2 represents partially the general structure of the integrated circuit CI1.
The output 46 of the circuit, intended for the base control of the transistor Tp, is the output of a push-pull amplification stage designated by the reference 48, this stage preferably comprising two separated amplifiers one of which receives square pulses which are inverted and delayed by several microseconds for to producing to the on state. Such amplifiers are well known.
The signals for switching to the on stae are issued from a logic flip-flop 50 having a set input 52 and a reset input 54. The set input triggers the on state of the power transistor. The reset input triggers the off state.
The set input 52(S) receives the pulses that pass through an AND gate 58, so that the triggering of the on state only occurs when several conditions are simultaneously satisfied; if a single condition is not satisfied, this is sufficient to inhibit the triggering of the on state.
The reset input 54(R) receives the pulses which pass through an OR gate 60, so that the interruption of the on state (after triggering of the on state) occurs once a halt signal is present on one of the inputs of this gate.
On the diagram of FIG. 2, the AND gate 58 has three inputs. One of these inputs receives periodic pulses issuing from an output 62 of a high frequency oscillator 64; the other inputs act to inhibit the transmission of these pulses.
The oscillator defines the switching period of the power supply (20 kilohertz for example). In normal operating state the oscillator 64 is synchronized by the regulation signals. In starting state it is self-oscillating at a free frequency defined by the values of a resistor Ro and of a capacitor Co outside the integrated circuit CI1 and respectively connected to an access terminal 66 and an access terminal 68. The free frequency Fo is as a rule slightly lower than the normal switching frequency.
The oscillator 64 is a relaxation oscillator that produces on an output 70 a saw-tooth, the reset to zero of which is set by the appearance of a positive pulse arriving at the terminal 40. This is the reason why the oscillator 64 is represented with an input connected to an output 72 of a separation and shaping circuit 74 that receives the regulation signals from the terminal 40 and shapes them by separating the positive pulses from the negative pulses. The shaping circuit 74 has two outputs: 72 for the positive pulses, 76 for the negative pulses (the notation of positive pulse and negative pulse will be retained in order to distinguish the triggering pulses for the on state and the triggering pulses for the off state even if the shaping circuit establishes pulses of a single sign on its two outputs 72 and 76).
The oscillator 64 has two outputs; an output 70 supplying a saw-tooth signal and an output 62 supplying a short pulse when the saw-tooth is reset to zero.
A pulse width modulator 78 is connected on the one hand to the output 70 of the oscillator and on the other hand to an adjustable reference voltage through a resistor R1 outside the integrated circuit and connected to an access terminal 80 to the circuit. The modulator 78 supplies periodic square pulses synchronized with the oscillator signals, these square pulses defining a maximal duration of the on state Tmax beyond which the off state of the power transistor must be triggered in any case as a matter of security. These square pulses of modulator 78 are applied to an input of the OR gate 60. The duration Tmax is adjustable through the external resistor R1.
The elements that have been described herein-above ensure the essential of the operating at normal condition of the integrated circuit CI1. The following elements are more specifically provided for controlling the anomalous operating or the starting of the power supply.
A very low frequency oscillator 82 is connected to an external capacitor C2 through an access terminal 86. This external capacitor adjusts the very low oscillation frequency. The frequency can be 1 hertz, for example.
The oscillator 82 is a relaxation oscillator supplying a saw-tooth signal which is applied on the one hand to a threshold comparator 88 which establishes periodic square pulses which are synchronized on the saw-tooth at a low frequency of the oscillator. These square pulses have a brief duration compared to the saw-tooth period. This duration is fixed by the threshold of the comparator 88. It can be for example of 10% of the period. It must be long with respect to the free oscillation period of the high frequency oscillator 64 so that a burst of numerous pulses of the high frequency oscillator can be emitted and utilized during this 10% of the period at very low frequency. This burst defines an attempt at starting during the first part of a starting cycle. It is followed by a pause during the remainder of the period, i.e. during the remaining 90% of the period.
The oscillator 82 only functions for the starting. It is inhibited when the regulation signals appear on the terminal 40 and indicate that the switch mode supply is functioning. This is the reason why an inhibition control of this oscillator has been represented, connected to the output 72 of the shaping circuit 74 through a flip-flop 89 which changes its condition under the effect of the pulses appearing at the output 72. It is returned to its initial condition by the output 62 of the oscillator 64 when there are no more pulses on the output 71.
The saw-tooth signals of the oscillator at very low frequency are furthermore transmitted to a circuit 90 for producing a variable threshold whose function is to establish a threshold signal (current or voltage) having a first value Vs1 in normal operating condition, and a cyclically variable threshold between the first value and a second value at starting condition.
The threshold signal established by the circuit 90 is applied to an input of a comparator 92, the other input of which is connected to the terminal 44 already mentioned, in order to receive on this input a signal that is representative of the amplitude of the current flowing through the power switching device. The output of the comparator 92 is applied to an input of the OR gate 60. It thus triggers the off state of the power transistor Tp, after an on state firing, the off state occuring, when exceeding the threshold (fixed or variable) defined by the circuit 90 has been detected.
Another threshold comparator 94 has an input connected to the current measuring terminal 44 while another input receives a signal representing a third threshold value Vs3. The third value Vs3 corresponds to a current in the switch which is higher than the first value vs1 defined by the circuit 90. The output of the comparator 94 is connected through a latch 96 to an input of the AND gate 58 whereby if the current in the power switch exceeds the third threshold value Vs3, an interruption of the on state of the transistor Tp is not triggered (this interruption is triggered by the comparator 92) but an inhibition of any firing of the transistor. This inhibition lasts until the flip-flop 96 is reset to its initial state corresponding to a normal operating.
As a rule, this return will only occur when the integrated circuit CI1 will have ceased to be normally supplied with power and will be again set under voltage. For example, the return of the latch 96 occurs through a hysteresis threshold comparator 98 which compares one fraction of the power supply voltage Vcc of the circuit (drawn off from the terminal 28) with a reference value and which resets the latch during the first passage of Vcc above this reference after a drop of Vcc below another reference value that is lower than the first one (hysteresis).
Moreover, it can be specified that the output of the flip-flop 89 (which detects the presence of regulation signals on the terminal 40 thus the normal operating of the power supply) is connected to an input of an OR gate 100 which receives on another input the output of the comparator 88 so that the output of the comparator 88 ceases to inhibit the firing of the transistor Tp (inhibition during 90% of the very low frequency cycles) once the operating of the power circuit becomes normal.